************************************************************************** *********************** ************************************************************************** *********************** ** ** ** File.................: led.asm ** ** ** ** Copyright 2003 by Kerwin Lumpkins ** ** ** ** This program sets up port a to be all output and walks a 1 up from bit ** up to bit 7, turns all bits off, then all bits on at once, then off, ** then ** loops and does it again. ************************************************************************** *********************** ************************************************************************** *********************** * Equates * * * * These are the locations of various MCU registers for the 68HC908GPXX * MCU. * ************************************************************************** *********************** pta equ $00 ;port a data register ptb equ $01 ;port b data register ptc equ $02 ;port c data register ptd equ $03 ;port d data register pte equ $08 ;port e data register ddra equ $04 ;port a data direction register ddrb equ $05 ;port b data direction register ddrc equ $06 ;port c data direction register ddrd equ $07 ;port d data direction register ddre equ $0C ;port e data direction register scc1 equ $13 ;sci control register 1 scc2 equ $14 ;sci control register 2 scc3 equ $15 ;sci control reg 3 scs1 equ $16 ;sci status reg 1 scs2 equ $17 ;sci status reg 2 scdr equ $18 ;sci data reg scbr equ $19 ;sci baud rate reg config2 equ $1E ;sci config reg 2 config1 equ $1f ;config register 1 t1sc equ $20 ;timer 1 status and control reg t1cnth equ $21 ;timer 1 counter reg high t1cntl equ $22 ;timer 1 counter reg low t1modh equ $23 ;timer 1 modulo reg high t1modl equ $24 ;timer 1 modulo reg low t1sc0 equ $25 ;timer 1 channel 0 status and control reg t1ch0h equ $26 ;timer 1 channel 0 reg high t1ch0l equ $27 ;timer 1 channel 0 reg low adscr equ $3C ;a2d status and control reg adr equ $3D ;a2d data register adclk equ $3E ;a2d clock register ram equ $40 ;start of ram flash equ $8000 ;start of flash ($b000 for GP20,$8000 for GP32) ******************* RAM variables ************************ org ram temp rmb $1 ;declare a variable called temp, 1 byte in size ************************************************************************ *********************** * Interrupt Vectors * * * * Go to interrupt vector area and fill with init to prevent any ** interrupts from affecting the * * code. * ************************************************************************** *********************** org $ffdc ;fill interrupt vectors fdb init ;timebase vector address fdb init ;conversion complete vector address fdb init ;keyboard pin vector address fdb init ;sci transmit complete, empty vectr address fdb init ;sci idle or receiver full vector address fdb init ;sci parity, framing, noise, overrun error address fdb init ;spi transmitter empty vector address fdb init ;spi full,over,fault vector address fdb init ;tim2 overflow vector address fdb init ;tim2 channel 1 vector address fdb init ;tim2 channel 0 vector address fdb init ;tim1 overflow vector address fdb init ;tim1 channel 1 vector address fdb init ;tim1 channel 0 vector address fdb init ;cgm (pll) vector address fdb init ;IRQ pin vector address fdb init ;swi instruction vector address fdb init ;reset vector address ************************************************************************** *********************** * Initialization * * * * This section clears variables, and sets up internal registers for the * microcontroller * ************************************************************************** *********************** org flash ;start main code at the beginning of flash init mov #$01,config2 ;Osc disable on stop, SCI clock source internal mov #$01,config1 ;COP disabled, all other default (see p142) ldhx #$0240 ;load HX with the end of memory location txs ;put the stack pointer at the end of memory clra ;clears A, X, and H regs clrx clrh clr temp ;init the variable mov #$00,pta ;sets port A data register to 0 for all bits mov #$FF,ddra ;sets port A to be all output mainloop: mov #$01,pta ;bit 0 or port A on, all others off mov #$02,pta ;bit 1 on, all others off mov #$04,pta ;bit 2 on, etc mov #$08,pta ;bit 3 on mov #$10,pta ;bit 4 on mov #$20,pta ;bit 5 mov #$40,pta ;bit 6 mov #$80,pta ;bit 7 clr pta ;all bits 0 now mov #$FF,pta ;all bits on now mov #$00,pta ;all bits off now, does same as clr instruction ; but clr takes 3 clock cycles, mov takes 4-5 ; now let's use a variable to store a value and move it to port a mov #$AA,temp ;put hex AA (binary 1010 1010) into temp variable mov temp,pta ;and put that into porta clr temp ;clear it out clr pta ;clear out port a (all zeros) bra mainloop ;and back to mainloop label to start over